Record Transconductance in Leff30 nm Self-Aligned Replacement Gate ETSOI nFETs Using Low EOT Negative Capacitance HfO2-ZrO2Superlattice Gate Stack

L. C. Wang*, W. Li, N. Shanker, S. S. Cheema, S. L. Hsu, S. Volkman, U. Sikder, C. Garg, J. H. Park, Y. H. Liao, Y. K. Lin, C. Hu, S. Salahuddin

*此作品的通信作者

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

We demonstrate short channel, extremely thin SOI (ETSOI, 6< nm), replacement gate nFETs down to effective gate length (Leff)∼ 30nm with low equivalent oxide thickness (EOT) negative capacitance (NC) HfO2-ZrO2 superlattice (HZH) gate stack [1-2]. Inversion capacitance measurement shows an EOT of 7 Å, which is 2.5-Å lower than typical industry HfO2 dielectrics. The transistors show record intrinsic transconductance (gmi)-2.11mS/mum, rivaling what is achieved in much shorter channel length (18nm) commercial devices such as 22FDX® technology. Importantly, the gm-Lg scaling trends deviate from industry benchmarks, showing that much larger gmi is achievable at the same channel length. Despite significantly worse series resistance, the devices show favorable performance in IonvsI on/Ioff tradeoff, providing larger I on and lower I off compared to industrial benchmarks of similar channel length.

原文English
主出版物標題2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9784863488069
DOIs
出版狀態Published - 2023
事件2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023 - Kyoto, Japan
持續時間: 11 6月 202316 6月 2023

出版系列

名字Digest of Technical Papers - Symposium on VLSI Technology
2023-June
ISSN(列印)0743-1562

Conference

Conference2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023
國家/地區Japan
城市Kyoto
期間11/06/2316/06/23

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