Reconfigurable Database Processor for Query Acceleration on FPGA

Bo En Chen, Bo Yen Lin, Bo Cheng Lai

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

FPGA (Field Programmable Gate Array) has been adopted as an efficient acceleration platform to support high throughput queries to big database. This paper proposes a Reconfigurable Database Processor (RDP) to enable end-to-end query processing. The engines can be reconfigured to support different design parameters. The data processing modules are allocated into stages, and composed to generate the accelerator structure for queries. We further proposed a systematic flow to adapt the design of RDP to the requirements of different queries. The experiments on TPC-DS have shown that RDP attains 56.5% higher throughput over the conventional solution on CPU. When compared with the previous FPGA designs, RDP shows 23.8% advantage on the overall performance while saving 13.6% FPGA resources.

原文English
主出版物標題2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781665419154
DOIs
出版狀態Published - 19 4月 2021
事件2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Hsinchu, 台灣
持續時間: 19 4月 202122 4月 2021

出版系列

名字2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Proceedings

Conference

Conference2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021
國家/地區台灣
城市Hsinchu
期間19/04/2122/04/21

指紋

深入研究「Reconfigurable Database Processor for Query Acceleration on FPGA」主題。共同形成了獨特的指紋。

引用此