Recent research in analog placement considering thermal gradient

Po-Hung Lin*

*此作品的通信作者

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

With the thermal effect, improper analog placements may degrade circuit performance because the thermal gradient can affect electrical characteristics of the thermally-sensitive devices. To mitigate the thermal effect in analog layout design, it is required to reduce thermally-induced mismatches among matched devices in addition to eliminating thermal hot spots. This paper presents major challenges for analog placement arising from the chip thermal gradient, introduces non-uniform and uniform thermal profiles as well as the corresponding placement configurations, surveys key existing techniques for analog placement under non-uniform and uniform thermal profiles, and provides the experimental results for analog placement with thermal consideration.

原文English
主出版物標題2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
頁面349-352
頁數4
DOIs
出版狀態Published - 7 十一月 2011
事件2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 - Linkoping, Sweden
持續時間: 29 八月 201131 八月 2011

出版系列

名字2011 20th European Conference on Circuit Theory and Design, ECCTD 2011

Conference

Conference2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
國家/地區Sweden
城市Linkoping
期間29/08/1131/08/11

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