Prototype IC with WDDL and differential routing - DPA resistance assessment

Kris Tiri*, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede

*此作品的通信作者

研究成果同行評審

134 引文 斯高帕斯(Scopus)

摘要

Wave dynamic differential logic combined with differential routing is a working, practical technique to thwart side-channel power attacks. Measurement-based experimental results show that a differential power analysis attack on a prototype IC, fabricated in 0.18μm CMOS, does not disclose the entire secret key of the AES algorithm at 1,500,000 measurement acquisitions. This makes the attack de facto infeasible. The required number of measurements is larger than the lifetime of the secret key in most practical systems.

原文English
頁(從 - 到)354-365
頁數12
期刊Lecture Notes in Computer Science
3659
DOIs
出版狀態Published - 4 11月 2005
事件7th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2005 - Edinburgh, 英國
持續時間: 29 8月 20051 9月 2005

指紋

深入研究「Prototype IC with WDDL and differential routing - DPA resistance assessment」主題。共同形成了獨特的指紋。

引用此