Process improvement of p-GaN HEMTs with a u-GaN etching buffer layer inserted

Chih Yao Chang*, Yao Luen Shen, Shun Wei Tang, Tian Li Wu*, Wei Hung Kuo, Suh Fang Lin, Yuh Renn Wu, Chih Fang Huang*

*此作品的通信作者

研究成果: Article同行評審

摘要

In this study, a 10 nm u-GaN etching buffer layer was designed and inserted into the standard p-GaN/AlGaN/GaN high electron mobility transistor structure to improve the p-GaN etching process. The experimental result shows that the device with the u-GaN layer can avoid the over-etched issue, further improving the uniformity of the etching profile and the ON-resistance of the devices. The simulation result indicates that the drain current would slightly increase due to reduced conduction band raising when the u-GaN layer is inserted. In sum, the process uniformity can improve when the u-GaN layer is inserted and in the meantime, excellent device characteristics are maintained.

原文English
文章編號116503
期刊Applied Physics Express
15
發行號11
DOIs
出版狀態Published - 11月 2022

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