Predicting Vt mean and variance from parallel Id measurement with model-fitting technique

Chih Ying Tsai; Kao Chi Lee; Chien Hsueh Lin; Sung Chu Yu; Wen Rong Liau; Alex Chun Liang Hou; Ying Yen Chen; Chun Yi Kuo; Jih Nung Lee; Chia-Tso Chao

doi:10.1109/VTS.2016.7477268

Predicting V_t mean and variance from parallel I_d measurement with model-fitting technique

Chih Ying Tsai, Kao Chi Lee, Chien Hsueh Lin, Sung Chu Yu, Wen Rong Liau, Alex Chun Liang Hou, Ying Yen Chen, Chun Yi Kuo, Jih Nung Lee, Chia-Tso Chao

電子研究所

研究成果: Conference contribution › 同行評審

4 引文斯高帕斯（Scopus）

摘要

To measure the variation of device V_t requires long test for conventional WAT test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of V_t for a large number of DUTs. The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of V_t based on only the combined I_d measured from parallel connected DUTs. The experimental results based on the SPICE simulation of a UMC 28nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R-squared for predicting both of V_t mean and variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve 42.9X speedup in turn of the required iterations of I_d measurement per DUT.

原文	English
主出版物標題	Proceedings - 2016 IEEE 34th VLSI Test Symposium, VTS 2016
發行者	IEEE Computer Society
ISBN（電子）	9781467384544
DOIs	https://doi.org/10.1109/VTS.2016.7477268
出版狀態	Published - 23 5月 2016
事件	34th IEEE VLSI Test Symposium, VTS 2016 - Las Vegas, 美國持續時間: 25 4月 2016 → 27 4月 2016

出版系列

名字	Proceedings of the IEEE VLSI Test Symposium
卷	2016-May

Conference

Conference	34th IEEE VLSI Test Symposium, VTS 2016
國家/地區	美國
城市	Las Vegas
期間	25/04/16 → 27/04/16

存取文件

10.1109/VTS.2016.7477268

其它文件與鏈接

Link to publication in Scopus

引用此

Tsai, C. Y., Lee, K. C., Lin, C. H., Yu, S. C., Liau, W. R., Hou, A. C. L., Chen, Y. Y., Kuo, C. Y., Lee, J. N., & Chao, C.-T. (2016). Predicting V_t mean and variance from parallel I_d measurement with model-fitting technique. 於 Proceedings - 2016 IEEE 34th VLSI Test Symposium, VTS 2016 文章 7477268 (Proceedings of the IEEE VLSI Test Symposium; 卷 2016-May). IEEE Computer Society. https://doi.org/10.1109/VTS.2016.7477268

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title = "Predicting Vt mean and variance from parallel Id measurement with model-fitting technique",

abstract = "To measure the variation of device Vt requires long test for conventional WAT test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of Vt for a large number of DUTs. The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of Vt based on only the combined Id measured from parallel connected DUTs. The experimental results based on the SPICE simulation of a UMC 28nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R-squared for predicting both of Vt mean and variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve 42.9X speedup in turn of the required iterations of Id measurement per DUT.",

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Tsai, CY, Lee, KC, Lin, CH, Yu, SC, Liau, WR, Hou, ACL, Chen, YY, Kuo, CY, Lee, JN & Chao, C-T 2016, Predicting V_t mean and variance from parallel I_d measurement with model-fitting technique. 於 Proceedings - 2016 IEEE 34th VLSI Test Symposium, VTS 2016., 7477268, Proceedings of the IEEE VLSI Test Symposium, 卷 2016-May, IEEE Computer Society, 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, 美國, 25/04/16. https://doi.org/10.1109/VTS.2016.7477268

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AU - Tsai, Chih Ying

AU - Lee, Kao Chi

AU - Lin, Chien Hsueh

AU - Yu, Sung Chu

AU - Liau, Wen Rong

AU - Hou, Alex Chun Liang

AU - Chen, Ying Yen

AU - Kuo, Chun Yi

AU - Lee, Jih Nung

AU - Chao, Chia-Tso

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AB - To measure the variation of device Vt requires long test for conventional WAT test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of Vt for a large number of DUTs. The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of Vt based on only the combined Id measured from parallel connected DUTs. The experimental results based on the SPICE simulation of a UMC 28nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R-squared for predicting both of Vt mean and variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve 42.9X speedup in turn of the required iterations of Id measurement per DUT.

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