Precoder/two-stage equaliser for block-based single-carrier transmission with insufficient guard interval

Y. Song*, Carrson C. Fung, K. T. Wong, H. Meng, D. F. Tseng

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    研究成果: Article同行評審

    1 引文 斯高帕斯(Scopus)

    摘要

    Proposed is a zero-inserting precoder and a two-stage linear equaliser, to shorten the guard interval in block-based single-carrier modulation. The first-stage equaliser consists of a linear single-tapper-subcarrier frequency-domain equaliser. The second-stage equaliser maximises the SINR, in the time-domain, based on the interference-plus-noise estimated from the zero-padded sub-intervals of the single-carrier modulation. This proposed scheme is applicable even without cyclic prefixing.

    原文English
    頁(從 - 到)746-748
    頁數3
    期刊Electronics Letters
    47
    發行號13
    DOIs
    出版狀態Published - 23 6月 2011

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