Pinning-free edge contact monolayer MoS2FET

Terry Y.T. Hung*, Shih Yun Wang, Chih Piao Chuu, Yun Yan Chung, Ang Sheng Chou, Feng Shew Huang, Tac Chen, Ming Yang Li, Chao Ching Cheng, Jin Cai, Chao Hsin Chien, Wen Hao Chang, H. S.Philip Wong, Lain Jong Li

*此作品的通信作者

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

One-dimensional contact (so-called edge contact) to monolayer 2D materials has been proposed for ultimate transistor scaling but reported on-state currents are much lower than those from top contact devices. Experiments in this work reveal that the fabrication processes for metal MoS2 contact strongly affect the electrical characteristics such as Schottky barrier height. Using in-situ 2D etching and metal deposition, we obtained Fermi-level pinning-free Ni-MoS2 edge contact transistor devices. Moreover, it reaches the highest on-state current among those TMDs edge contact devices reported in literatures and comparable to top-contact ones. First-principles calculation reveals the evolution of local electronic structure from strong metallization at the edge contact "interline"(1D equivalent of "interface") to semiconductor in the channel region. The short length (<3 nm) of metal-semiconductor transition and the low-dimensionality nature of the edge contact eliminate Fermi level pining. The pinning free edge contact formed through in-situ process enables 2D based high performance FET.

原文English
主出版物標題2020 IEEE International Electron Devices Meeting, IEDM 2020
發行者Institute of Electrical and Electronics Engineers Inc.
頁面3.3.1-3.3.4
ISBN(電子)9781728188881
DOIs
出版狀態Published - 12 十二月 2020
事件66th Annual IEEE International Electron Devices Meeting, IEDM 2020 - Virtual, San Francisco, United States
持續時間: 12 十二月 202018 十二月 2020

出版系列

名字Technical Digest - International Electron Devices Meeting, IEDM
2020-December
ISSN(列印)0163-1918

Conference

Conference66th Annual IEEE International Electron Devices Meeting, IEDM 2020
國家/地區United States
城市Virtual, San Francisco
期間12/12/2018/12/20

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