Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node

Chang Hung Yu, Jun Teng Zheng, Pin Su, Ching Te Chuang

    研究成果: Conference contribution同行評審

    摘要

    We comprehensively evaluate and benchmark the performance of pass-transistor logic (PTL) circuits using monolayer and bilayer transition metal dichalcogenide (TMD) devices based on ITRS 2028 node. Our study indicates that the higher VT of bilayer TMD devices significantly degrades the performance of single pass-transistor based circuits compared with the monolayer counterparts despite the higher mobility of bilayer TMD devices. The effect can be mitigated by using full transmission gate or providing a complementary path.

    原文English
    主出版物標題2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017
    發行者Institute of Electrical and Electronics Engineers Inc.
    ISBN(電子)9781509058051
    DOIs
    出版狀態Published - 7 6月 2017
    事件2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017 - Hsinchu, 台灣
    持續時間: 24 4月 201727 4月 2017

    出版系列

    名字2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017

    Conference

    Conference2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017
    國家/地區台灣
    城市Hsinchu
    期間24/04/1727/04/17

    指紋

    深入研究「Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node」主題。共同形成了獨特的指紋。

    引用此