Paralleled multi-GaN MIS-HEMTs integrated cascode switch for power electronic applications

Surya Elangovan*, Stone Cheng, Wen Yea Jang, Edward Yi Chang, Hao Chung Kuo


研究成果: Article同行評審


A cascode gallium nitride (GaN) switch integrating four paralleled GaN depletion-mode metal-insulator-semiconductor-high-electron-mobility transistors (MIS-HEMT) and a silicon MOSFET (Si-MOSFET) is presented. Each GaN chip is wire-bonded into a multi-chip power module to scale up the power rating. An optimized symmetric configuration and wire bonding of an integral package are used in the cascode switch. By utilizing an optimized packaging approach, the performance of the multi-GaN-chip cascode switch was evaluated through both static and dynamic characterizations. The constructed cascode switch provides a low-static on-state resistance of 72 mΩ and an off-state blocking capability of 400 V with a positive threshold voltage of 2 V. Analysis of dynamic switching characteristics are discussed and demonstrates stable dynamic on-state resistance (R DS-ON) in inductive load circuits with switching dependencies of voltage, frequency, time, and temperature. The extended defects from buffer caused a minimal decrease in dynamic and static R DS-ON with respect to hard switching conditions. However, there was no noticeable degradation in R DS-ON under harsh switching conditions. This study provides a complete analysis of the multi-GaN-chip cascode switch, including MIS-HEMT manufacturing, cascode packaging and static and dynamic characterizations.

期刊Semiconductor Science and Technology
出版狀態Published - 7月 2023


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