P-MOSFET gate current and device degradation

Tong Chern Ong*, Koichi Seki, Ping K. Ko, Chen-Ming Hu

*此作品的通信作者

研究成果: Paper同行評審

1 引文 斯高帕斯(Scopus)

摘要

Hot-carrier-limited device lifetime of surface-channel p-MOSFETs (p-channel metal-oxide-semiconductor field-effect transistors) is found to correlate well with gate current over a wide range of bias. The same result is not observed for buried-channel p-MOSFETs. A gate current model for surface-channel p-MOSFETs is presented. Using this gate current model, reasonable estimates of AC (pulse) stress lifetime can be made based on DC stress data.

原文English
頁面193-196
頁數4
DOIs
出版狀態Published - 1 十二月 1989
事件International Symposium on VLSI Technology, Systems and Applications - Proceedings of Technical Papers - Taipei, Taiwan
持續時間: 17 五月 198919 五月 1989

Conference

ConferenceInternational Symposium on VLSI Technology, Systems and Applications - Proceedings of Technical Papers
城市Taipei, Taiwan
期間17/05/8919/05/89

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