Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design

Jen Chieh Liu; Tzu Yun Wu; Tuo-Hung Hou

doi:10.1109/TCSII.2018.2821268

Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design

Jen Chieh Liu, Tzu Yun Wu, Tuo-Hung Hou^*

^*此作品的通信作者

電子研究所

研究成果: Article › 同行評審

10 引文斯高帕斯（Scopus）

摘要

A device-circuit co-design strategy of incremental step pulse programming (ISPP) tailored specifically for resistive-switching random access memory (RRAM) is elaborated using HfO₂ RRAM as an example. The proposed strategy optimizes ISPP by considering programming energy, speed, peripheral circuit design, and device lifetime simultaneously. Interplay between ISPP configuration and device switching behavior is comprehensively clarified, and the result provides useful indicators for estimating peripheral circuit overhead and programming performance. Overstress effects affect both switching voltages and endurance lifetime substantially and, thus, should be carefully minimized.

原文	English
頁（從 - 到）	617-621
頁數	5
期刊	IEEE Transactions on Circuits and Systems I: Regular Papers
卷	65
發行號	5
DOIs	https://doi.org/10.1109/TCSII.2018.2821268
出版狀態	Published - 5月 2018

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10.1109/TCSII.2018.2821268

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title = "Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design",

abstract = "A device-circuit co-design strategy of incremental step pulse programming (ISPP) tailored specifically for resistive-switching random access memory (RRAM) is elaborated using HfO2 RRAM as an example. The proposed strategy optimizes ISPP by considering programming energy, speed, peripheral circuit design, and device lifetime simultaneously. Interplay between ISPP configuration and device switching behavior is comprehensively clarified, and the result provides useful indicators for estimating peripheral circuit overhead and programming performance. Overstress effects affect both switching voltages and endurance lifetime substantially and, thus, should be carefully minimized.",

keywords = "ISPP, RRAM, device-circuit co-design, over stress",

author = "Liu, {Jen Chieh} and Wu, {Tzu Yun} and Tuo-Hung Hou",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.",

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Y1 - 2018/5

N2 - A device-circuit co-design strategy of incremental step pulse programming (ISPP) tailored specifically for resistive-switching random access memory (RRAM) is elaborated using HfO2 RRAM as an example. The proposed strategy optimizes ISPP by considering programming energy, speed, peripheral circuit design, and device lifetime simultaneously. Interplay between ISPP configuration and device switching behavior is comprehensively clarified, and the result provides useful indicators for estimating peripheral circuit overhead and programming performance. Overstress effects affect both switching voltages and endurance lifetime substantially and, thus, should be carefully minimized.

AB - A device-circuit co-design strategy of incremental step pulse programming (ISPP) tailored specifically for resistive-switching random access memory (RRAM) is elaborated using HfO2 RRAM as an example. The proposed strategy optimizes ISPP by considering programming energy, speed, peripheral circuit design, and device lifetime simultaneously. Interplay between ISPP configuration and device switching behavior is comprehensively clarified, and the result provides useful indicators for estimating peripheral circuit overhead and programming performance. Overstress effects affect both switching voltages and endurance lifetime substantially and, thus, should be carefully minimized.

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JF - IEEE Transactions on Circuits and Systems I: Regular Papers

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Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design

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