Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design

Jen Chieh Liu, Tzu Yun Wu, Tuo-Hung Hou*

*此作品的通信作者

研究成果: Article同行評審

6 引文 斯高帕斯(Scopus)

摘要

A device-circuit co-design strategy of incremental step pulse programming (ISPP) tailored specifically for resistive-switching random access memory (RRAM) is elaborated using HfO2 RRAM as an example. The proposed strategy optimizes ISPP by considering programming energy, speed, peripheral circuit design, and device lifetime simultaneously. Interplay between ISPP configuration and device switching behavior is comprehensively clarified, and the result provides useful indicators for estimating peripheral circuit overhead and programming performance. Overstress effects affect both switching voltages and endurance lifetime substantially and, thus, should be carefully minimized.

原文English
頁(從 - 到)617-621
頁數5
期刊IEEE Transactions on Circuits and Systems I: Regular Papers
65
發行號5
DOIs
出版狀態Published - 1 5月 2018

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