Optimization on NMOS-based power-rail ESD clamp circuits with gate-driven mechanism in a 0.13-μm CMOS technology

Shin Hung Chen*, Ming-Dou Ker

*此作品的通信作者

    研究成果: Conference contribution同行評審

    8 引文 斯高帕斯(Scopus)

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    深入研究「Optimization on NMOS-based power-rail ESD clamp circuits with gate-driven mechanism in a 0.13-μm CMOS technology」主題。共同形成了獨特的指紋。

    Keyphrases

    Engineering