This work comprises of design and simulation of multi-channel line tunnel field-effect transistors (mCLTFETs) by scaling inter-gate separation (IGS) and overlapped source (LOV). The scope of the work is to explore the performance boost and optimization of the studied devices by considering geometrical structures, low-bandgap materials, IGS and LOV of the mCLTFETs. The structure is designed without diminishing the subthreshold swing (SS) and the leakage currents through a spacer technology and strained Si0.6Ge0.4. The optimal values of IGS and LOV for the multi-channel concept are estimated subject to several physical constraints of the proposed device. An IGS ≈ 10 nm and a LOV ≈ LG/2 are reported as suitable choice for sub-8-nm technological nodes, where SS = 18 mV/dec and Ion/Ioff = 109 are achieved.