Onboard FPGA-based SAR processing for future spaceborne systems

Charles Le*, Samuel Chan, Frank Cheng, Winston Fang, Mark Fischman, Scott Hensley, Robert Johnson, Michael Jourdan, Miguel Marina, Bruce Parham, Francois Rogez, Paul Rosen, Biren Shah, Stephanie Taft

*此作品的通信作者

研究成果: Paper同行評審

48 引文 斯高帕斯(Scopus)

摘要

We present a real-time high-performance and fault-tolerant FPGA-based hardware architecture for the processing of synthetic aperture radar (SAR) images in future spaceborne system. In particular, we will discuss the integrated design approach, from top-level algorithm specifications and system requirements, design methodology, functional verification and performance validation, down to hardware design and implementation.

原文English
頁面15-20
頁數6
DOIs
出版狀態Published - 4月 2004
事件Proceedings of the IEEE Radar Conference - Philadelphia, PA, United States
持續時間: 26 4月 200429 4月 2004

Conference

ConferenceProceedings of the IEEE Radar Conference
國家/地區United States
城市Philadelphia, PA
期間26/04/0429/04/04

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