On the design of selective coefficient DCT module

Chung Yen Lu*, Kuei-Ann Wen

*此作品的通信作者

研究成果: Article同行評審

5 引文 斯高帕斯(Scopus)

摘要

In this transactions letter, an innovative selective coefficient discrete cosine transform (SCDCT) architecture is proposed which is designed for selective coefficient computation and straightforward row-column computation. Having these features, the selective coefficient DCT core will fit for various area/speed requirements. It can save the transposition delay to simplify the computation flow of two-dimensional (2-D) DCT and, in view of circuit implementation, SCDCT is multiply-free and thus area/speed efficient.

原文English
文章編號5887647
頁(從 - 到)143-146
頁數4
期刊IEEE Transactions on Circuits and Systems for Video Technology
8
發行號2
DOIs
出版狀態Published - 四月 1998

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