摘要
This letter provides a viewpoint for the characterization of state-of-the-art thin film sllicon-on-insulator (SOI) MOSFETs. Based on body - source built-in potential lowering, the degree of full depletion can be quantified. In addition to serving as a measure of the floating-body behavior of SOI devices, the concept also enables the consolidation of partial-depletion (PD) and full-depletion (FD) SOI compact models. This consolidation of compact models together with the trend of coexistence of PD/FD devices in a single chip has become one of the greatest challenges in the scaling of SOI CMOS.
原文 | English |
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頁(從 - 到) | 90-92 |
頁數 | 3 |
期刊 | IEEE Electron Device Letters |
卷 | 24 |
發行號 | 2 |
DOIs | |
出版狀態 | Published - 1 2月 2003 |