On the body-source built-in potential lowering of SOI MOSFETs

Pin Su*, Samuel K.H. Fung, Peter W. Wyatt, Hui Wan, Ali M. Niknejad, Mansun Chan, Chen-Ming Hu

*此作品的通信作者

研究成果: Article同行評審

16 引文 斯高帕斯(Scopus)

摘要

This letter provides a viewpoint for the characterization of state-of-the-art thin film sllicon-on-insulator (SOI) MOSFETs. Based on body - source built-in potential lowering, the degree of full depletion can be quantified. In addition to serving as a measure of the floating-body behavior of SOI devices, the concept also enables the consolidation of partial-depletion (PD) and full-depletion (FD) SOI compact models. This consolidation of compact models together with the trend of coexistence of PD/FD devices in a single chip has become one of the greatest challenges in the scaling of SOI CMOS.

原文English
頁(從 - 到)90-92
頁數3
期刊IEEE Electron Device Letters
24
發行號2
DOIs
出版狀態Published - 1 2月 2003

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