On-panel electrostatic discharge (ESD) protection design with thin-film transistor in LTPS process

Ming-Dou Ker*, Jie Yao Chuang, Chih Kang Deng, Chung Hong Kuo, Chun Huai Li, Ming Sheng Lai, Chih Wei Wang, Chun Ting Liu

*此作品的通信作者

    研究成果: Conference contribution同行評審

    1 引文 斯高帕斯(Scopus)

    摘要

    The electrostatic discharge (ESD) robustness of diode-connected n-type thin-film transistors (N-TFTs) and diode-connected p-type thin-film transistors (P-TFTs) with different layout structures in a given low-temperature polycrystalline silicon (LTPS) process is investigated. By using the wafer-level transmission line pulsing (TLP) system, the high-current transient characteristics and the secondary breakdown current (It2) levels of the diode-connected TFTs under different device parameters and layout structures are directly measured on the glass substrate. Finally, one set of design rules for on-panel ESD protection design is suggested.

    原文English
    主出版物標題AD'07 - Proceedings of Asia Display 2007
    頁面551-556
    頁數6
    出版狀態Published - 3月 2007
    事件Asia Display 2007, AD'07 - Shanghai, 中國
    持續時間: 12 3月 200716 3月 2007

    出版系列

    名字AD'07 - Proceedings of Asia Display 2007
    1

    Conference

    ConferenceAsia Display 2007, AD'07
    國家/地區中國
    城市Shanghai
    期間12/03/0716/03/07

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