On Optimizing Capacitor Array Design for Advanced Node SAR ADC

Cheng Yu Chiang, Chia Lin Hu, Kang Yu Chang, Po-Hung Lin, Shyh Jye Jou, Hung Yu Chen, Chien-Nan Liu, Hung-Ming Chen

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

Due to its excellent power efficiency, the successive-Approximation-register (SAR) analog-To-digital converter (ADC) is an attractive design choice for low-power ADC implements. In analog layout design, the parasitics induced by interconnecting wires and elements affect the accuracy and performance of the device. Due to the requirement of low-power and high-speed, the series of lateral metal-metal very small capacitor units as the architecture of capacitor array is usually adopted. Besides power consumption and area reduction, the parasitic capacitance would significantly affect the matching properties and setting time of capacitors. This work presents a framework to synthesize good-quality binary-weighted capacitors for custom advanced node planar SAR ADC. Also, this work proposed a parasitic-Aware ILP-based routing algorithm, which can generate an optimized layout considering parasitic capacitance and capacitance ratio mismatch simultaneously. The experimental result shows that the effective number of bits (ENOB) of the layout generated by our approach is comparable with manual design and other automated works.

原文English
主出版物標題Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781665467032
DOIs
出版狀態Published - 2022
事件18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022 - Villasimius, Italy
持續時間: 12 6月 202215 6月 2022

出版系列

名字Proceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022

Conference

Conference18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
國家/地區Italy
城市Villasimius
期間12/06/2215/06/22

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