TY - GEN
T1 - On-Interposer Decoupling Capacitors Placement for Interposer-based 3DIC
AU - Chen, Po Yang
AU - Liu, Chang Yun
AU - Chen, Hung Ming
AU - Huang, Po Tsang
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - With the demand for high performance and density, silicon interposer-based three-dimensional integrated circuit (3DIC) can be one of promising solutions for these requirements. However, simultaneously switching noise (SSN) will cause voltage fluctuation and hence performance degradation and logic failure might occur. Our work proposes an efficient Simulated Annealing (SA) based algorithm to perform decap placement automatically on the interposer. In our solution, target impedance can be achieved within certain frequency range. Results show that number of decaps as well as impedance of PDN are minimized to meet the requirement.
AB - With the demand for high performance and density, silicon interposer-based three-dimensional integrated circuit (3DIC) can be one of promising solutions for these requirements. However, simultaneously switching noise (SSN) will cause voltage fluctuation and hence performance degradation and logic failure might occur. Our work proposes an efficient Simulated Annealing (SA) based algorithm to perform decap placement automatically on the interposer. In our solution, target impedance can be achieved within certain frequency range. Results show that number of decaps as well as impedance of PDN are minimized to meet the requirement.
UR - http://www.scopus.com/inward/record.url?scp=85161611669&partnerID=8YFLogxK
U2 - 10.1109/ISQED57927.2023.10129288
DO - 10.1109/ISQED57927.2023.10129288
M3 - Conference contribution
AN - SCOPUS:85161611669
T3 - Proceedings - International Symposium on Quality Electronic Design, ISQED
BT - Proceedings of the 24th International Symposium on Quality Electronic Design, ISQED 2023
PB - IEEE Computer Society
T2 - 24th International Symposium on Quality Electronic Design, ISQED 2023
Y2 - 5 April 2023 through 7 April 2023
ER -