On DRC Cleanness of Cell Porting for Design Migrations in Foundries and Technologies

Ching Ying Wang, Chen Ho Chen, Po Hsiang Chang, Chien Yu Hsieh, Ching Feng Su, Scott Ji, Chien Nan Jimmy Liu, Hung Ming Chen

研究成果: Conference contribution同行評審

摘要

Modern design migration needs fast turn-around time from one node to another to keep products competitive, including standard cell library generation. In such a scenario, we plan to preserve the original topology and inherit the original design intention, as well as predictable performance. Since the conventional handcrafted redesign of the standard cell library requires considerable engineering effort and design time, how to efficiently migrate/port the cell libraries with tedious design rules to follow become crucial. This work exploits the nature of DRC reports generated by the commercial DRC tool and presents an automatic standard cell layout migration framework to efficiently migrate cell library to be utilized in switching foundries and technologies. The experimental results show that the cell layout topology is well preserved in leading foundry 28nm technology and 0.18um automotive high voltage technology, and successfully reaching DRC cleanness.

原文English
主出版物標題2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9798350360349
DOIs
出版狀態Published - 2024
事件2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Hsinchu, 台灣
持續時間: 22 4月 202425 4月 2024

出版系列

名字2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024 - Proceedings

Conference

Conference2024 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2024
國家/地區台灣
城市Hsinchu
期間22/04/2425/04/24

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