TY - JOUR
T1 - On-chip voltage down converter for LV/LP digital system
AU - Jou, Shyh-Jye
AU - Chen, Tsu Lin
PY - 1997
Y1 - 1997
N2 - A new on-chip differential amplifier based DC to DC Voltage Down Converter (VDC) is proposed. The converter is a negative feedback-type voltage follower with precise internal reference voltage generator, and high current drive capability. This VDC converts 5 V to lower voltage that the internal circuits of the chip are used. In here, 3 V is used as a test vehicle. The proposed VDC has characteristics such as output voltage remains 3 V over a large load current range (0-100 mA), temperature dependency of 29 mv/°c. The VDC chip was fabricated in a 0.8 um Single-Poly-Double-Metal CMOS process and layout size is 690*210 μm2. The output voltage is stabilized within ±1% for supply voltage with ±10% variation has been achieved.
AB - A new on-chip differential amplifier based DC to DC Voltage Down Converter (VDC) is proposed. The converter is a negative feedback-type voltage follower with precise internal reference voltage generator, and high current drive capability. This VDC converts 5 V to lower voltage that the internal circuits of the chip are used. In here, 3 V is used as a test vehicle. The proposed VDC has characteristics such as output voltage remains 3 V over a large load current range (0-100 mA), temperature dependency of 29 mv/°c. The VDC chip was fabricated in a 0.8 um Single-Poly-Double-Metal CMOS process and layout size is 690*210 μm2. The output voltage is stabilized within ±1% for supply voltage with ±10% variation has been achieved.
UR - http://www.scopus.com/inward/record.url?scp=0030648299&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.1997.621545
DO - 10.1109/ISCAS.1997.621545
M3 - Conference article
AN - SCOPUS:0030648299
SN - 0271-4310
VL - 3
SP - 1996
EP - 1999
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4)
Y2 - 9 June 1997 through 12 June 1997
ER -