On-chip self-calibrated process-temperature sensor for TSV 3D integration

Tzu Ting Chiang; Po-Tsang Huang; Ching Te Chuang; Kuan-Neng Chen; Jin-Chern Chiou; Kuo Hua Chen; Chi Tsung Chiu; Ho Ming Tong; Wei Hwang

doi:10.1109/SOCC.2012.6398338

On-chip self-calibrated process-temperature sensor for TSV 3D integration

Tzu Ting Chiang^*, Po-Tsang Huang, Ching Te Chuang, Kuan-Neng Chen, Jin-Chern Chiou, Kuo Hua Chen, Chi Tsung Chiu, Ho Ming Tong, Wei Hwang

^*此作品的通信作者

研究成果: Conference contribution › 同行評審

4 引文斯高帕斯（Scopus）

摘要

In TSV 3D integration, stacking multiple dies would face a severe challenge of the thermal stress and V_t scatter. In this paper, a fully on-chip self-calibrated process-temperature (PT) sensor is proposed to monitor the transistor variations (V_tn, V_tp) and temperature of the intra-die for 3D-ICs. The process information and temperature can be decoupled using the process-sensitive and temperature-dependent ring oscillators. Based on TSMC 65nm CMOS process, this sensor achieves 367.5 pJ per conversion, and the sensitivities of V_tn, V_tp and the inaccuracy of temperature are merely ±1.6mV, ±0.8mV, and ±1.5C, respectively.

原文	English
主出版物標題	Proceedings - IEEE International SOC Conference, SOCC 2012
頁面	370-375
頁數	6
DOIs	https://doi.org/10.1109/SOCC.2012.6398338
出版狀態	Published - 1 12月 2012
事件	25th IEEE International System-on-Chip Conference, SOCC 2012 - Niagara Falls, NY, United States 持續時間: 12 9月 2012 → 14 9月 2012

出版系列

名字	International System on Chip Conference
ISSN（列印）	2164-1676
ISSN（電子）	2164-1706

Conference

Conference	25th IEEE International System-on-Chip Conference, SOCC 2012
國家/地區	United States
城市	Niagara Falls, NY
期間	12/09/12 → 14/09/12

存取文件

10.1109/SOCC.2012.6398338

其它文件與鏈接

Link to publication in Scopus

引用此

Chiang, T. T., Huang, P.-T., Chuang, C. T., Chen, K.-N., Chiou, J.-C., Chen, K. H., Chiu, C. T., Tong, H. M., & Hwang, W. (2012). On-chip self-calibrated process-temperature sensor for TSV 3D integration. 於 Proceedings - IEEE International SOC Conference, SOCC 2012 (頁 370-375). 文章 6398338 (International System on Chip Conference). https://doi.org/10.1109/SOCC.2012.6398338

@inproceedings{6bca68ecef50410fb80ef1e96938b56f,

title = "On-chip self-calibrated process-temperature sensor for TSV 3D integration",

abstract = "In TSV 3D integration, stacking multiple dies would face a severe challenge of the thermal stress and Vt scatter. In this paper, a fully on-chip self-calibrated process-temperature (PT) sensor is proposed to monitor the transistor variations (Vtn, Vtp) and temperature of the intra-die for 3D-ICs. The process information and temperature can be decoupled using the process-sensitive and temperature-dependent ring oscillators. Based on TSMC 65nm CMOS process, this sensor achieves 367.5 pJ per conversion, and the sensitivities of Vtn, Vtp and the inaccuracy of temperature are merely ±1.6mV, ±0.8mV, and ±1.5C, respectively.",

author = "Chiang, {Tzu Ting} and Po-Tsang Huang and Chuang, {Ching Te} and Kuan-Neng Chen and Jin-Chern Chiou and Chen, {Kuo Hua} and Chiu, {Chi Tsung} and Tong, {Ho Ming} and Wei Hwang",

year = "2012",

month = dec,

day = "1",

doi = "10.1109/SOCC.2012.6398338",

language = "English",

isbn = "9781467312950",

series = "International System on Chip Conference",

pages = "370--375",

booktitle = "Proceedings - IEEE International SOC Conference, SOCC 2012",

note = "25th IEEE International System-on-Chip Conference, SOCC 2012 ; Conference date: 12-09-2012 Through 14-09-2012",

}

Chiang, TT, Huang, P-T, Chuang, CT, Chen, K-N , Chiou, J-C, Chen, KH, Chiu, CT, Tong, HM & Hwang, W 2012, On-chip self-calibrated process-temperature sensor for TSV 3D integration. 於 Proceedings - IEEE International SOC Conference, SOCC 2012., 6398338, International System on Chip Conference, 頁 370-375, 25th IEEE International System-on-Chip Conference, SOCC 2012, Niagara Falls, NY, United States, 12/09/12. https://doi.org/10.1109/SOCC.2012.6398338

TY - GEN

T1 - On-chip self-calibrated process-temperature sensor for TSV 3D integration

AU - Chiang, Tzu Ting

AU - Huang, Po-Tsang

AU - Chuang, Ching Te

AU - Chen, Kuan-Neng

AU - Chiou, Jin-Chern

AU - Chen, Kuo Hua

AU - Chiu, Chi Tsung

AU - Tong, Ho Ming

AU - Hwang, Wei

PY - 2012/12/1

Y1 - 2012/12/1

N2 - In TSV 3D integration, stacking multiple dies would face a severe challenge of the thermal stress and Vt scatter. In this paper, a fully on-chip self-calibrated process-temperature (PT) sensor is proposed to monitor the transistor variations (Vtn, Vtp) and temperature of the intra-die for 3D-ICs. The process information and temperature can be decoupled using the process-sensitive and temperature-dependent ring oscillators. Based on TSMC 65nm CMOS process, this sensor achieves 367.5 pJ per conversion, and the sensitivities of Vtn, Vtp and the inaccuracy of temperature are merely ±1.6mV, ±0.8mV, and ±1.5C, respectively.

AB - In TSV 3D integration, stacking multiple dies would face a severe challenge of the thermal stress and Vt scatter. In this paper, a fully on-chip self-calibrated process-temperature (PT) sensor is proposed to monitor the transistor variations (Vtn, Vtp) and temperature of the intra-die for 3D-ICs. The process information and temperature can be decoupled using the process-sensitive and temperature-dependent ring oscillators. Based on TSMC 65nm CMOS process, this sensor achieves 367.5 pJ per conversion, and the sensitivities of Vtn, Vtp and the inaccuracy of temperature are merely ±1.6mV, ±0.8mV, and ±1.5C, respectively.

UR - http://www.scopus.com/inward/record.url?scp=84872505021&partnerID=8YFLogxK

U2 - 10.1109/SOCC.2012.6398338

DO - 10.1109/SOCC.2012.6398338

M3 - Conference contribution

AN - SCOPUS:84872505021

SN - 9781467312950

T3 - International System on Chip Conference

SP - 370

EP - 375

BT - Proceedings - IEEE International SOC Conference, SOCC 2012

T2 - 25th IEEE International System-on-Chip Conference, SOCC 2012

Y2 - 12 September 2012 through 14 September 2012

ER -

On-chip self-calibrated process-temperature sensor for TSV 3D integration

摘要

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