TY - JOUR
T1 - On-Chip Over-Voltage Protection Design Against Surge Events on the CC Pin of USB Type-C Interface
AU - Ke, Chao-Yang
AU - Ker, Ming-Dou
PY - 2020/7
Y1 - 2020/7
N2 - As fast charging being a comprehensive application in universal serial bus (USB) type-C products, the high-power delivery may cause the USB type-C interface in the high risk of surge events. Therefore, a switch realized by high voltage N-type metal oxide semiconductor transistor (HVNMOS) has been added to the configuration channel (CC) pin to prevent the internal circuits from surge damage. However, hot carrier degradation (HCD) on the HVNMOS was induced by surge events, especially when the HVNMOS was operating in the ON-state. To mitigate HCD on the HVNMOS switch during surge events, a new over-voltage protection (OVP) design with selected voltage-level detection was proposed and verified in a 0.15-mu m BCD technology. The proposed OVP circuit with a positive feedback is designed to turn off the gate of the HVNMOS switch for a longer time when surge zapping on the CC pin. The experimental results from silicon chip have successfully verified the proposed OVP structure in device level and circuit level, respectively.
AB - As fast charging being a comprehensive application in universal serial bus (USB) type-C products, the high-power delivery may cause the USB type-C interface in the high risk of surge events. Therefore, a switch realized by high voltage N-type metal oxide semiconductor transistor (HVNMOS) has been added to the configuration channel (CC) pin to prevent the internal circuits from surge damage. However, hot carrier degradation (HCD) on the HVNMOS was induced by surge events, especially when the HVNMOS was operating in the ON-state. To mitigate HCD on the HVNMOS switch during surge events, a new over-voltage protection (OVP) design with selected voltage-level detection was proposed and verified in a 0.15-mu m BCD technology. The proposed OVP circuit with a positive feedback is designed to turn off the gate of the HVNMOS switch for a longer time when surge zapping on the CC pin. The experimental results from silicon chip have successfully verified the proposed OVP structure in device level and circuit level, respectively.
KW - Electrical overstress (EOS)
KW - hot carrier degradation (HCD)
KW - overvoltage protection (OVP)
KW - surge protection
KW - surge test
KW - universal serial bus (USB) type-C
KW - HOT-CARRIER RELIABILITY
KW - TRANSISTORS
U2 - 10.1109/TED.2020.2992383
DO - 10.1109/TED.2020.2992383
M3 - Article
SN - 0018-9383
VL - 67
SP - 2702
EP - 2709
JO - Ieee Transactions On Electron Devices
JF - Ieee Transactions On Electron Devices
IS - 7
ER -