On-chip ESD protection design with substrate-triggered technique for mixed-voltage I/O circuits in subquarter-micrometer CMOS process

Ming-Dou Ker*, Kun Hsien Lin, Chien Hui Chuang

*此作品的通信作者

    研究成果: Article同行評審

    14 引文 斯高帕斯(Scopus)

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    深入研究「On-chip ESD protection design with substrate-triggered technique for mixed-voltage I/O circuits in subquarter-micrometer CMOS process」主題。共同形成了獨特的指紋。

    Keyphrases

    Engineering

    Material Science