摘要
ESD protection in RF integrated circuits has several considerations: low parasitic capacitance, constant input capacitance, and insensitive to substrate coupling noise. In this paper, a new ESD protection design with polysilicon diodes for RF IC applications is proposed and characterized. The proposed polysilicon diode is constructed by polysilicon layer in a general CMOS process with a central un-doped region. The polysilicon diode with variation on the width of the central un-doped region is characterized at different temperatures. An on-chip ESD protection circuit realized with the stacked polysilicon diodes to reduce the total input capacitance for GHz RF application is demonstrated.
原文 | American English |
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頁面 | 240-243 |
頁數 | 4 |
DOIs | |
出版狀態 | Published - 4月 2001 |
事件 | 2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings - Hsinchu, Taiwan 持續時間: 18 4月 2001 → 20 4月 2001 |
Conference
Conference | 2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings |
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國家/地區 | Taiwan |
城市 | Hsinchu |
期間 | 18/04/01 → 20/04/01 |