TY - JOUR
T1 - On-chip ESD protection design by using polysilicon diodes in CMOS technology for smart card application
AU - Wang, Tai Ho
AU - Ker, Ming-Dou
PY - 2000/9/26
Y1 - 2000/9/26
N2 - A novel on-chip ESD protection design by using polysilicon diodes for smart card application is reported in this paper. By adding an efficient VDD-to-VSS clamp circuit, the HBM ESD level of the smart card IC with polysilicon diodes as the ESD protection devices have been successfully improved from the original approximately 300 V to become ≥3 kV. Different process splits have been experimentally evaluated to find the suitable doping concentration for optimizing, the polysilicon diodes for both smart card application and on-chip ESD protection design.
AB - A novel on-chip ESD protection design by using polysilicon diodes for smart card application is reported in this paper. By adding an efficient VDD-to-VSS clamp circuit, the HBM ESD level of the smart card IC with polysilicon diodes as the ESD protection devices have been successfully improved from the original approximately 300 V to become ≥3 kV. Different process splits have been experimentally evaluated to find the suitable doping concentration for optimizing, the polysilicon diodes for both smart card application and on-chip ESD protection design.
UR - http://www.scopus.com/inward/record.url?scp=0034544873&partnerID=8YFLogxK
U2 - 10.1109/EOSESD.2000.890086
DO - 10.1109/EOSESD.2000.890086
M3 - Conference article
AN - SCOPUS:0034544873
SN - 0739-5159
SP - 266
EP - 275
JO - Electrical Overstress/Electrostatic Discharge Symposium Proceedings
JF - Electrical Overstress/Electrostatic Discharge Symposium Proceedings
M1 - 890086
T2 - Electrical Overstress/Electrostatic Discharge Symposium Proceedings
Y2 - 26 September 2000 through 28 September 2000
ER -