On-chip, attofarad interconnect charge-based capacitance measurement (CBCM) technique

James C. Chen*, Bruce W. McGaughy, Dennis Sylvester, Chen-Ming Hu


研究成果: Conference article同行評審

75 引文 斯高帕斯(Scopus)


In this paper, a sensitive and simple technique for parasitic interconnect capacitance measurement with 0.01fF or 10 aF sensitivity is presented. This on-chip technique is based upon an efficient test structure design. No reference capacitor is needed. The measurement itself is also simple; only a DC current meter is required. We have applied this technique to extract various interconnect geometry capacitances, including the capacitance of a single Metal 2 over Metal 1 crossing, for an industrial double metal process.

頁(從 - 到)69-72
期刊Technical Digest - International Electron Devices Meeting
出版狀態Published - 1 十二月 1996
事件Proceedings of the 1996 IEEE International Electron Devices Meeting - San Francisco, CA, USA
持續時間: 8 十二月 199611 十二月 1996


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