This paper reports a preliminary study result of an on-board spaceborne SAR processor. It consists of a processing requirement analysis, functional specifications, and implementation with VLSI system-on-chip technology. Finally, a minimum version of this VLSI on-board processor designed for performance evaluation and for partial demonstration is illustrated.
|期刊||Proceedings - IEEE International Symposium on Circuits and Systems|
|出版狀態||Published - 7 9月 2004|
|事件||2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada|
持續時間: 23 5月 2004 → 26 5月 2004