Numerical simulation of programming transient behavior in charge trapping storage memory

C. H. Lee, C. W. Wu, S. W. Lin, T. H. Yeh, S. H. Gu, K. F. Chen, Y. J. Chen, J. Y. Hsieh, I. J. Huang, N. K. Zous, T. T. Han, M. S. Chen, W. P. Lu, Ta-Hui Wang, C. Y. Lu

研究成果: Conference contribution同行評審

7 引文 斯高帕斯(Scopus)

摘要

This work aims to develop an accurate programming transient model for a SONOS type memory cell. By considering (i) the current tunneling through bottom oxide from substrate, (ii) the capture/emission efficiency in nitride, and (iii) the out tunneling probability from top dielectric, an excellent consistency between experiments and simulations is observed across various programming voltages. The programming behavior under various combinations of storage materials and blocking layers are also well demonstrated by incorporating the band-gap difference. Finally, the penalty of widened programming VT distribution due to the thinning down of tunneling oxide is examined and clarified.

原文English
主出版物標題2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, Proceedings, NVSMW/ICMTD
頁面109-110
頁數2
DOIs
出版狀態Published - 1 九月 2008
事件2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, NVSMW/ICMTD - Opio, France
持續時間: 18 五月 200822 五月 2008

出版系列

名字2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, Proceedings, NVSMW/ICMTD

Conference

Conference2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, NVSMW/ICMTD
國家/地區France
城市Opio
期間18/05/0822/05/08

指紋

深入研究「Numerical simulation of programming transient behavior in charge trapping storage memory」主題。共同形成了獨特的指紋。

引用此