Novel two-bit-per-cell resistive-switching memory for low-cost embedded applications

A novel two-bit-per-cell embedded nonvolatile memory (NVM) device requiring no additional mask and process modification in a logic technology has been proposed using a low-temperature poly-Si thin-film transistor with a HfO-{2}/\hbox{Ni} gate stack. The feature of two-bit-per-cell is realized by independent localized resistive switching (RS) at the drain and source bits, respectively, and enables increased bit density over the present single-poly NVM for low-cost embedded applications. Furthermore, minimal degradation of the transistor characteristics after RS allows interchangeable logic/memory operations in an identical device.