Novel Operation Schemes to Improve Device Reliability in a Localized Trapping Storage SONOS-type Flash Memory

C. C. Yeh*, W. J. Tsai, T. C. Lu, H. Y. Chen, H. C. Lai, N. K. Zous, Y. Y. Liao, G. D. You, S. K. Cho, C. C. Liu, F. S. Hsu, L. T. Huang, W. S. Chiang, C. J. Liu, C. F. Cheng, M. H. Chou, C. H. Chen, Ta-Hui Wang, Wenchi Ting, Sam PanJoseph Ku, Chih Yuan Lu

*此作品的通信作者

    研究成果: Conference article同行評審

    11 引文 斯高帕斯(Scopus)

    摘要

    Over erasure, charge gain in low Vt state, and charge loss in high Vt state are found to be the most severe reliability issues in a localized trapping storage flash memory cell. In this paper, based on our understanding of physical mechanisms, we demonstrate that by adding vertical electrical field treatments during program/erase operation, the over erasure and data retentivities in high/low Vt states are significantly improved.

    原文English
    頁(從 - 到)173-176
    頁數4
    期刊Technical Digest - International Electron Devices Meeting
    DOIs
    出版狀態Published - 1 12月 2003
    事件IEEE International Electron Devices Meeting - Washington, DC, United States
    持續時間: 8 12月 200310 12月 2003

    指紋

    深入研究「Novel Operation Schemes to Improve Device Reliability in a Localized Trapping Storage SONOS-type Flash Memory」主題。共同形成了獨特的指紋。

    引用此