Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications

Yi Hsien Lu; Po Yi Kuo; Yi Hong Wu; Yi Hsuan Chen; Tien-Sheng Chao

Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications

Yi Hsien Lu^*, Po Yi Kuo, Yi Hong Wu, Yi Hsuan Chen, Tien-Sheng Chao

^*此作品的通信作者

電子物理學系

研究成果: Conference contribution › 同行評審

25 引文斯高帕斯（Scopus）

摘要

A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.

原文	English
主出版物標題	2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers
頁面	142-143
頁數	2
出版狀態	Published - 16 9月 2011
事件	2011 Symposium on VLSI Technology, VLSIT 2011 - Kyoto, Japan 持續時間: 14 6月 2011 → 16 6月 2011

出版系列

名字	Digest of Technical Papers - Symposium on VLSI Technology
ISSN（列印）	0743-1562

Conference

Conference	2011 Symposium on VLSI Technology, VLSIT 2011
國家/地區	Japan
城市	Kyoto
期間	14/06/11 → 16/06/11

其它文件與鏈接

Link to publication in Scopus

引用此

@inproceedings{e5fcf8d07c564cacb197be294caafbe9,

title = "Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications",

abstract = "A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.",

author = "Lu, {Yi Hsien} and Kuo, {Po Yi} and Wu, {Yi Hong} and Chen, {Yi Hsuan} and Tien-Sheng Chao",

year = "2011",

month = sep,

day = "16",

language = "English",

isbn = "9784863481640",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

pages = "142--143",

booktitle = "2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers",

note = "null ; Conference date: 14-06-2011 Through 16-06-2011",

}

Lu, YH, Kuo, PY, Wu, YH, Chen, YH & Chao, T-S 2011, Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications. 於 2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers., 5984675, Digest of Technical Papers - Symposium on VLSI Technology, 頁 142-143, 2011 Symposium on VLSI Technology, VLSIT 2011, Kyoto, Japan, 14/06/11.

Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications. / Lu, Yi Hsien; Kuo, Po Yi; Wu, Yi Hong 等.

2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers. 2011. p. 142-143 5984675 (Digest of Technical Papers - Symposium on VLSI Technology).

研究成果: Conference contribution › 同行評審

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AU - Lu, Yi Hsien

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AU - Wu, Yi Hong

AU - Chen, Yi Hsuan

AU - Chao, Tien-Sheng

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N2 - A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.

AB - A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.

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Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications

摘要

出版系列

Conference

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