A novel method for depositing low-cost and high-quality electro-less plating (ELP) copper film has been realized to fabricate copper-gate thin film transistors in this work. The electro-less NiP serves as an adhesion layer on glass substrate first and then the copper films are self-aligned on it. All processes of gate electrodes are fabricated under ambient environment. Electrical characteristics of the inverse staggered amorphous silicon thin film transistors (a-TFTs) are studied comprehensively. The threshold voltage is about 3.55V and the filed mobility is up to 0.56 at VD=7.67V.
|出版狀態||Published - 1 12月 2009|
|事件||2009 International Display Manufacturing Conference, 3D Systems and Applications, and Asia Display, IDMC/3DSA/Asia Display 2009 - Taipei, Taiwan|
持續時間: 27 4月 2009 → 30 4月 2009
|Conference||2009 International Display Manufacturing Conference, 3D Systems and Applications, and Asia Display, IDMC/3DSA/Asia Display 2009|
|期間||27/04/09 → 30/04/09|