Novel Complementary FeFET- based Lookup Table and Routing Switch Design and their Applications in Energy/Area-Efficient FPGA

Yuan Yu Huang, Po Tsang Huang, Po Yi Lee, Pin Su

研究成果: Conference contribution同行評審

摘要

This work explores the potential of voltage-mode complementary ferroelectric FET (CFeFET) to realize energy/area-efficient nonvolatile logics for both memory-intensive and computation-intensive applications. CFeFET can be constructed by a p-type FeFET stacking on a n-type FeFET with only one transistor's footprint. Each single CFeFET can be utilized as a 1-bit storage element and a 2-to-1 multiplexer without any short currents. Moreover, leakage current is further reduced due to higher Vth of unselected n-FeFET or p-FeFET. Additionally, we further demonstrate FPGA building blocks using the CFeFET. Our simulation results show that the CFeFET can achieve superior Power-Performance-Area (PPA) when compared to the same designs implemented by SRAM or current-mode FeFET.

原文English
主出版物標題7th IEEE Electron Devices Technology and Manufacturing Conference
主出版物子標題Strengthen the Global Semiconductor Research Collaboration After the Covid-19 Pandemic, EDTM 2023
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9798350332520
DOIs
出版狀態Published - 2023
事件7th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2023 - Seoul, Korea, Republic of
持續時間: 7 3月 202310 3月 2023

出版系列

名字7th IEEE Electron Devices Technology and Manufacturing Conference: Strengthen the Global Semiconductor Research Collaboration After the Covid-19 Pandemic, EDTM 2023

Conference

Conference7th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2023
國家/地區Korea, Republic of
城市Seoul
期間7/03/2310/03/23

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