Novel 2-bit/cell wrapped-select-gate SONOS TFT memory using source-side injection for NOR-type flash array

Kuan Ti Wang*, Fang Chang Hsueh, Yu Lun Lu, Tsung Yu Chiang, Yi Hong Wu, Chia Chun Liao, Li Chen Yen, Tien-Sheng Chao

*此作品的通信作者

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

This letter is the first to successfully demonstrate the 2-bit/cell wrapped-selected-gate (WSG) SONOS thin-film transistor (TFT) memory using source-side injection (SSI). Because of the higher programming efficiency of SSI, a memory window of approximately 3 V can be easily achieved in 10 μ s and 30 ms for the program and erase modes, respectively. In addition, we performed an excellent 2-bit/cell distinguish margin for 3-V memory window in WSG-SONOS TFT memory. The optimal reliability of the endurance and data retention tests can be executed by adjusting the applied voltage appropriately.

原文English
文章編號6194261
頁(從 - 到)839-841
頁數3
期刊IEEE Electron Device Letters
33
發行號6
DOIs
出版狀態Published - 10 5月 2012

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