A new paradigm of predictive MOSFET and interconnect modeling is introduced. This approach is developed to specifically address SPICE compatible parameters for future technology generations. For a given technology node, designers can use default values or directly input Leff, Tox, Vt, Rdsw and interconnect dimensions to instantly obtain a BSIM3v3 customized model for early stages of circuit design and research. Models for 0.18μm and 0.13μm technology nodes with Leff down to 70nm are currently available on the web. Comparisons with published data and 2D simulations are used to verify this predictive technology model.
|頁（從 - 到）||201-204|
|期刊||Proceedings of the Custom Integrated Circuits Conference|
|出版狀態||Published - 1 一月 2000|
|事件||CICC 2000: 22nd Annual Custom Integrated Circuits Conference - Orlando, FL, USA|
持續時間: 21 五月 2000 → 24 五月 2000