A new diode string design with very low leakage current is proposed for using in the on-chip power supply ESD (electrostatic discharge) clamp circuits. Three traditional designs of the stacked diode strings used in the power supply ESD clamp circuits are also fabricated in the same test chip to verify the improvement of this new design. By adding an NMOS-controlled lateral SCR (NCLSCR) device into the stacked diode string, the leakage current of this new proposed diode string with 6 stacked diodes under a 5-V (3.3-V) forward bias condition can be controlled below 2.1 (1.07) nA at an environment temperature of 125 °C. The blocking voltage of this new diode string design with NCLSCR can be linearly adjusted by simply changing the number of the stacked diodes in the diode string for application across the power lines with different voltage levels to achieve the whole-chip ESD protection scheme.
|頁（從 - 到）||69-72|
|期刊||Proceedings - IEEE International Symposium on Circuits and Systems|
|出版狀態||Published - 28 5月 2000|
|事件||Proceedings of the IEEE 2000 International Symposium on Circuits and Systems - Geneva, Switz|
持續時間: 28 5月 2000 → 31 5月 2000