Neutral beam and ICP etching of HKMG MOS capacitors: Observations and a plasma-induced damage model

Tai Chen Kuo*, Tzu Lang Shih, Yin Hsien Su, Wen Hsi Lee, Michael Ira Current, Seiji Samukawa

*此作品的通信作者

研究成果: Article同行評審

4 引文 斯高帕斯(Scopus)

摘要

In this study, TiN/HfO2/Si metal-oxide-semiconductor (MOS) capacitors were etched by a neutral beam etching technique under two contrasting conditions. The configurations of neutral beam etching technique were specially designed to demonstrate a "damage-free" condition or to approximate "reactive-ion-etching-like" conditions to verify the effect of plasma-induced damage on electrical characteristics of MOS capacitors. The results show that by neutral beam etching (NBE), the interface state density (Dit) and the oxide trapped charge (Qot) were lower than routine plasma etching. Furthermore, the decrease in capacitor size does not lead to an increase in leakage current density, indicating less plasma induced side-wall damage. We present a plasma-induced gate stack damage model which we demonstrate by using these two different etching configurations. These results show that NBE is effective in preventing plasma-induced damage at the high-k/Si interface and on the high-k oxide sidewall and thus improve the electrical performance of the gate structure.

原文English
文章編號161517
期刊Journal of Applied Physics
123
發行號16
DOIs
出版狀態Published - 28 4月 2018

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