摘要
In this letter, nanoscale p-MOS TFTs with a TiN gate electrode were realized using a novel microwave (MW) dopant-activation technique. We compared both low-temperature MW annealing and rapid thermal annealing. We successfully activated the source/drain region and suppressed the short-channel effects using low-temperature MW annealing. This technique is promising from the viewpoint of realizing high-performance and low-cost upper layer nanoscale transistors required for low-temperature 3-D integrated circuit fabrication.
原文 | English |
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文章編號 | 5427093 |
頁(從 - 到) | 437-439 |
頁數 | 3 |
期刊 | IEEE Electron Device Letters |
卷 | 31 |
發行號 | 5 |
DOIs | |
出版狀態 | Published - 1 5月 2010 |