Nano-CMOS technology for next fifteen years

Hiroshi Iwai*, Hei Wong

*此作品的通信作者

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

Complementary Metal-Oxide-Semiconductor (CMOS) technology has been developed into the sub-100 nm range. It is expected that the nano-CMOS technology will govern the IC manufacturing for at least another couple of decades. Though there are many challenges ahead, further down-sizing the device to a few nanometers is still on the schedule of International Technology Roadmap for Semiconductors (ITRS). Several technological options for manufacturing nano-CMOS microchips are available or will soon be available. This paper reviews the challenges of nano-CMOS downsizing and manufacturing. We shall focus on the recent progresses on the key technologies for the nano-CMOS IC fabrication in the next fifteen years.

原文English
主出版物標題2006 IEEE Region 10 Conference, TENCON 2006
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(列印)1424405491, 9781424405497
DOIs
出版狀態Published - 2006
事件2006 IEEE Region 10 Conference, TENCON 2006 - Hong Kong, China
持續時間: 14 十一月 200617 十一月 2006

出版系列

名字IEEE Region 10 Annual International Conference, Proceedings/TENCON
ISSN(列印)2159-3442
ISSN(電子)2159-3450

Conference

Conference2006 IEEE Region 10 Conference, TENCON 2006
國家/地區China
城市Hong Kong
期間14/11/0617/11/06

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