TY - GEN
T1 - Multiplierless multirate decimator / interpolator module generator
AU - Jou, Shyh-Jye
AU - Jheng, Kai Yuan
AU - Chen, Hsiao Yun
AU - Wu, An Yeu
PY - 2004/12/1
Y1 - 2004/12/1
N2 - A module generator, which can automate the process of designing high-speed low-complexity multistage multirate decimator / interpolator, is presented. The generator exploit architectural symmetries in linear phase filters and multistage multirate interpolated FIR filter design methodology for low complexity. In addition, the polyphase representation is used to decompose the filter into subfilters. The resulting filters utilize canonic signed digit (CSD) multipliers, a transposed direct form structure, and carry-save addition for high speed. A filter design example with TSMC 0.25μm standard cell for 64-QAM baseband demodulator shows that the area is reduced by 39% for low-complexity applications. Moreover, for high-speed application, the chip can operate at 714MHz. Finally, a designed decimator which is used in the CDMA cellular shows that the area is reduced by 70% as compared with conventional approach.
AB - A module generator, which can automate the process of designing high-speed low-complexity multistage multirate decimator / interpolator, is presented. The generator exploit architectural symmetries in linear phase filters and multistage multirate interpolated FIR filter design methodology for low complexity. In addition, the polyphase representation is used to decompose the filter into subfilters. The resulting filters utilize canonic signed digit (CSD) multipliers, a transposed direct form structure, and carry-save addition for high speed. A filter design example with TSMC 0.25μm standard cell for 64-QAM baseband demodulator shows that the area is reduced by 39% for low-complexity applications. Moreover, for high-speed application, the chip can operate at 714MHz. Finally, a designed decimator which is used in the CDMA cellular shows that the area is reduced by 70% as compared with conventional approach.
UR - http://www.scopus.com/inward/record.url?scp=14544301016&partnerID=8YFLogxK
U2 - 10.1109/APASIC.2004.1349404
DO - 10.1109/APASIC.2004.1349404
M3 - Conference contribution
AN - SCOPUS:14544301016
SN - 078038637X
T3 - Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
SP - 58
EP - 61
BT - Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
T2 - Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
Y2 - 4 August 2004 through 5 August 2004
ER -