Multichip module based RISC processor with programmable hardware

Michael Newell*, Wai-Chi  Fang, Richard Johannesson, Leon Alkalai

*此作品的通信作者

研究成果: Conference article同行評審

摘要

A multichip module (MCM) based RISC processor with programmable hardware has been developed for the new era of miniaturized spacecraft required for NASA's 'faster, better, cheaper' missions. The MCM based processor incorporates a complete 32-bit RISC computer including RAM, EEPROM and programmable hardware. This paper describes the system architecture and its associated MCM design and implementation. It also explores the architectural merits of including user programmable hardware.

原文English
頁(從 - 到)119-122
頁數4
期刊Proceedings of the Annual IEEE International ASIC Conference and Exhibit
DOIs
出版狀態Published - 1995
事件Proceedings of the 8th Annual IEEE International ASIC Conference and Exhibit - Austin, TX, USA
持續時間: 18 9月 199522 9月 1995

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