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MSIM: A Highly Parallel Near-Memory Accelerator for MinHash Sketch
Aman Sinha, Jhih Yong Mai,
Bo Cheng Lai
電機工程學系
研究成果
:
Conference contribution
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同行評審
1
引文 斯高帕斯(Scopus)
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Keyphrases
Access to Information
33%
Area Overhead
33%
Assembly pipeline
33%
Big Data Analytics
66%
Bound Computation
33%
Calculator
33%
Commercially Available
33%
Data Mapping
33%
Data Processing Architecture
33%
Dual In-line Memory Module
66%
Efficient Hardware
33%
Energy Overhead
33%
Energy Reduction
33%
Genome Assembly
33%
Genome Sequencing
33%
Group Level
33%
Hardware-software Co-design
33%
Hashing
33%
High Bandwidth
33%
High Efficiency
33%
Highly Parallel
100%
K-mer
33%
L1 Cache
66%
Lightweight Components
33%
Limited Area
33%
Limited Bandwidth
33%
Limited Power
33%
Long-read Genome Assembly
33%
Low Latency
66%
Major Components
33%
Mapping Scheme
33%
Massive Computations
33%
Memory Bank
33%
Memory Bound
33%
Memory Controller
33%
MinHash
100%
MinHash Sketching
66%
Multi-threaded Software
33%
Near-data Processing
66%
Near-memory Accelerator
100%
Optimal Data
33%
Parallel Hardware
33%
Processing Engine
100%
Scalable Performance
33%
Sequence Database
33%
Similarity Search
66%
Sketch Processing
66%
Software Solution
33%
Stall
33%
Computer Science
Accelerator Memory
100%
Application Specific Integrated Circuit
50%
Big Data Analytics
100%
Computer Hardware
50%
Data Access
50%
Data Mapping
50%
Data Processing
100%
Data Structure
50%
Dual Inline Memory Module
100%
Graphics Processing Unit
50%
L1 Cache
100%
Major Component
50%
Mapping Scheme
50%
Memory Bound
50%
Memory Controller
50%
Participatory Design
50%
Potential Application
50%
Processing Architecture
50%
Processing Sketch
100%
Sequence Database
50%
Similarity Search
100%
Software Solution
50%