MSIM: A Highly Parallel Near-Memory Accelerator for MinHash Sketch

Aman Sinha, Jhih Yong Mai, Bo Cheng Lai

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

Genome Assembly is an important Big Data analytics which involves massive computations for similarity searches on sequence databases. Being major component of runtime, similarity searches require careful design for scalable performance. MinHash Sketching is an extensively used data structure in Long-read genome assembly pipelines, which involves generating, randomizing and minimizing a set of hashes for all the k-mers in genome sequences. Compute-hungry MinHash sketch processing on commercially available multi-threaded CPUs suffer from the limited bandwidth of the L1-cache, which causes the CPUs to stall. Near-Data Processing (NDP) is an emerging trend in data-bound Big Data analytics to harness the low-latency, highbandwidth available within the Dual In-line Memory Modules (DIMMs). While NDP architectures have generally been utilized for memory-bound computations, MinHash sketching is a potential application that can gain massive throughput by exploiting memory Banks as higher bandwidth L1-cache.In this work, we propose MSIM, a distributed, highly parallel and efficient hardware-software co-design for accelerating MinHash Sketch processing on light-weight components placed on the DRAM hierarchy. Multiple ASIC-based Processing Engines (PEs) placed at the bank-group-level in MSIM provide highparallelism for low-latency computations. The PEs sequentially access data from all Banks within their bank-group with the help of a dedicated Address calculator, which utilizes an optimal data mapping scheme. The PEs are controlled by a custom Arbiter, which is directly activated by the host CPU using general DDR commands, without requiring any modification to the memory controller or the DIMM standard buses. MSIM requires limited area and power overheads, while displaying up-to 384.9x speedup and 1088.4x energy reduction compared to the baseline multithreaded software solution in our experiments. MSIM achieves 4.26x speedup over high-end GPU, while consuming 26.4x lesser energy. Moreover, MSIM design is highly scalable and extendable in nature.

原文English
主出版物標題Proceedings - 2022 IEEE 35th International System-on-Chip Conference, SOCC 2022
編輯Sakir Sezer, Thomas Buchner, Jurgen Becker, Andrew Marshall, Fahad Siddiqui, Tanja Harbaum, Kieran McLaughlin
發行者IEEE Computer Society
ISBN(電子)9781665459853
DOIs
出版狀態Published - 2022
事件35th IEEE International System-on-Chip Conference, SOCC 2022 - Belfast, Northern Ireland, United Kingdom
持續時間: 5 9月 20228 9月 2022

出版系列

名字International System on Chip Conference
2022-September
ISSN(列印)2164-1676
ISSN(電子)2164-1706

Conference

Conference35th IEEE International System-on-Chip Conference, SOCC 2022
國家/地區United Kingdom
城市Belfast, Northern Ireland
期間5/09/228/09/22

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