TY - JOUR

T1 - MOTA

T2 - A MOSFET TIMING SIMULATOR.

AU - Jou, Shyh-Jye

AU - Jen, C. W.

AU - Shen, W. Z.

AU - Lee, C. L.

PY - 1986/1/1

Y1 - 1986/1/1

N2 - MOTA; a new NMOS and CMOS timing simulator, is presented. Basically, it employs a one sweep nonlinear Gauss-Seidal relaxation technique to decouple node equations, and this results in a linear performance on the computation time over the number of the gates of the circuit. It has three features: (a) it provides a 'SUBCIRCUIT' capability to simulate tightly-coupled circuit blocks. This solves the inaccuracy and the instability problems which are usually encountered in existing timing simulators, (b) it employs a physical table model for MOS devices with only 250 storage points, and (c) it utilizes a simple variable time step control scheme and internal and external bypass schemes to increase the simulation speed. Examples show that it is approximately 60 times faster than SPICE2G-5 while giving comparable precision.

AB - MOTA; a new NMOS and CMOS timing simulator, is presented. Basically, it employs a one sweep nonlinear Gauss-Seidal relaxation technique to decouple node equations, and this results in a linear performance on the computation time over the number of the gates of the circuit. It has three features: (a) it provides a 'SUBCIRCUIT' capability to simulate tightly-coupled circuit blocks. This solves the inaccuracy and the instability problems which are usually encountered in existing timing simulators, (b) it employs a physical table model for MOS devices with only 250 storage points, and (c) it utilizes a simple variable time step control scheme and internal and external bypass schemes to increase the simulation speed. Examples show that it is approximately 60 times faster than SPICE2G-5 while giving comparable precision.

UR - http://www.scopus.com/inward/record.url?scp=0022794546&partnerID=8YFLogxK

U2 - 10.1049/ip-i-1.1986.0041

DO - 10.1049/ip-i-1.1986.0041

M3 - Article

AN - SCOPUS:0022794546

SN - 1751-858X

VL - 133

SP - 193

EP - 199

JO - IET Circuits, Devices and Systems

JF - IET Circuits, Devices and Systems

IS - 5

ER -