MOS-bounded diodes for on-chip ESD protection in deep submicron CMOS process

Ming-Dou Ker*, Kun Hsien Lin, Che Hao Chuang

*此作品的通信作者

    研究成果: Article同行評審

    1 引文 斯高帕斯(Scopus)

    摘要

    New diode structures without the field-oxide boundary across the p/n junction for ESD protection are proposed. A NMOS (PMOS) is especially inserted into the diode structure to form the NMOS-bounded (PMOS-bounded) diode, which is used to block the field oxide isolation across the p/n junction in the diode structure. The proposed N(P)MOS-bounded diodes can provide more efficient ESD protection to the internal circuits, as compared to the other diode structures. The N(P)MOS-bounded diodes can be used in the I/O ESD protection circuits, power-rail ESD clamp circuits, and the ESD conduction cells between the separated power lines. From the experimental results, the human-body-model ESD level of ESD protection circuit with the proposed N(P)MOS-bounded diodes is greater than 8 kV in a 0.35-μm CMOS process.

    原文English
    頁(從 - 到)429-436
    頁數8
    期刊IEICE Transactions on Electronics
    E88-C
    發行號3
    DOIs
    出版狀態Published - 1 1月 2005

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