Module generator of data recovery for serial link receiver

Shyh-Jye Jou, Chih Hsien Lin, Yen Hung Chen, Zheng Hong Li

研究成果: Conference contribution同行評審

4 引文 斯高帕斯(Scopus)

摘要

A module generator for the all-digital data recovery of a highspeed serial link, using an oversampling method, is proposed. The architecture of the proposed method is very regular and hence very suitable for standard cell implementation flow, which also makes it very suitable as a soft silicon intellectual property. This module generator can automatically generate the design parameters to deal with the oversampling architecture to meet different specifications. A design example, generated by the module generator, is implemented by using the TSMC 0.35 μm 1P4M cell library. The maximum performance of the design (without extra pipelining stages) can reach 2.09 Gbps with power consumption of 112.2 mW at 3.3 V.

原文English
主出版物標題Proceedings - IEEE International SOC Conference, SOCC 2003
編輯Dong S. Ha, Richard Auletta, John Chickanosky
發行者Institute of Electrical and Electronics Engineers Inc.
頁面95-98
頁數4
ISBN(電子)0780381823, 9780780381827
DOIs
出版狀態Published - 1 1月 2003
事件IEEE International SOC Conference, SOCC 2003 - Portland, United States
持續時間: 17 9月 200320 9月 2003

出版系列

名字Proceedings - IEEE International SOC Conference, SOCC 2003

Conference

ConferenceIEEE International SOC Conference, SOCC 2003
國家/地區United States
城市Portland
期間17/09/0320/09/03

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