Modeling the substrate depletion region for GaAs FETs fabricated on semi-insulating substrates

Peter George; Ping K. Ko; Chen-Ming Hu

doi:10.1016/0038-1101(89)90184-6

Modeling the substrate depletion region for GaAs FETs fabricated on semi-insulating substrates

Peter George^*, Ping K. Ko, Chen-Ming Hu

^*此作品的通信作者

國際半導體產業學院

研究成果: Article › 同行評審

1 引文斯高帕斯（Scopus）

摘要

A calculation of the channel-substrate space charge densities and dimensions is required in the formulation of device models for modern GaAs FETs which are fabricated on semi-insulating substrates with multiple deep levels. We describe a procedure to deduce this information from the compensation scheme utilized to obtain semi-insulating behavior.

原文	English
頁（從 - 到）	165-168
頁數	4
期刊	Solid State Electronics
卷	32
發行號	2
DOIs	https://doi.org/10.1016/0038-1101(89)90184-6
出版狀態	Published - 1 1月 1989

存取文件

10.1016/0038-1101(89)90184-6

其它文件與鏈接

Link to publication in Scopus

引用此

@article{cff3562bf6f8411d800eaa35b140a5bc,

title = "Modeling the substrate depletion region for GaAs FETs fabricated on semi-insulating substrates",

abstract = "A calculation of the channel-substrate space charge densities and dimensions is required in the formulation of device models for modern GaAs FETs which are fabricated on semi-insulating substrates with multiple deep levels. We describe a procedure to deduce this information from the compensation scheme utilized to obtain semi-insulating behavior.",

author = "Peter George and Ko, {Ping K.} and Chen-Ming Hu",

year = "1989",

month = jan,

day = "1",

doi = "10.1016/0038-1101(89)90184-6",

language = "English",

volume = "32",

pages = "165--168",

journal = "Solid-State Electronics",

issn = "0038-1101",

publisher = "Elsevier Limited",

number = "2",

}

TY - JOUR

T1 - Modeling the substrate depletion region for GaAs FETs fabricated on semi-insulating substrates

AU - George, Peter

AU - Ko, Ping K.

AU - Hu, Chen-Ming

PY - 1989/1/1

Y1 - 1989/1/1

N2 - A calculation of the channel-substrate space charge densities and dimensions is required in the formulation of device models for modern GaAs FETs which are fabricated on semi-insulating substrates with multiple deep levels. We describe a procedure to deduce this information from the compensation scheme utilized to obtain semi-insulating behavior.

AB - A calculation of the channel-substrate space charge densities and dimensions is required in the formulation of device models for modern GaAs FETs which are fabricated on semi-insulating substrates with multiple deep levels. We describe a procedure to deduce this information from the compensation scheme utilized to obtain semi-insulating behavior.

UR - http://www.scopus.com/inward/record.url?scp=0024612529&partnerID=8YFLogxK

U2 - 10.1016/0038-1101(89)90184-6

DO - 10.1016/0038-1101(89)90184-6

M3 - Article

AN - SCOPUS:0024612529

VL - 32

SP - 165

EP - 168

JO - Solid-State Electronics

JF - Solid-State Electronics

SN - 0038-1101

IS - 2

ER -

Modeling the substrate depletion region for GaAs FETs fabricated on semi-insulating substrates

摘要

存取文件

其它文件與鏈接

指紋

引用此