Modeling and minimizing variations of gate-all-around multiple-channel nanowire TFTs

Keyphrases

• Multi-channel 100%
• Grain Boundary 100%
• Nanowires 100%
• Gate-all-around 100%
• Poly-Si 75%
• Polycrystalline Silicon Thin-film Transistors (poly-Si TFTs) 75%
• Electrical Characteristics 50%
• Grain Size 50%
• Defect Density 50%
• Subthreshold Swing 50%
• Threshold Voltage 50%
• Device Performance 50%
• Channel Width 50%
• Voltage Swing 50%
• Performance Improvement 25%
• Order of Magnitude 25%
• Randomly Oriented 25%
• Trap Density 25%
• Single Crystal 25%
• Short Channel Effects 25%
• Channel Surface 25%
• Gate Structure 25%
• Metal-induced Crystallization 25%
• Downscaling 25%
• Nanowire Channel 25%
• Multiple Nanowire 25%
• Device Dimensions 25%
• Excimer Laser Annealing 25%
• Surface Potential 25%
• TFT Characteristics 25%
• Planar Device 25%
• Random Distribution 25%
• Density Region 25%
• Multiple Gate 25%
• Grain Boundary Defects 25%
• Grain Boundary Traps 25%
• Typical Value 25%
• Active-matrix Liquid-crystal Display 25%
• Fine-grained Structure 25%
• Effective Channel Width 25%
• Crystal Grain 25%
• Additional Electric Field 25%
• Carrier Transport Efficiency 25%
• Carrier Devices 25%
• Electrical Fluctuations 25%

Engineering

• Nanowire 100%
• Grain Boundaries 100%
• Polysilicon 66%
• Defect Density 33%
• Thin-Film Transistor 33%
• Device Performance 33%
• Poly-Si Grain 33%
• Liquid Crystal Display 16%
• Effective Channel 16%
• Channel Region 16%
• Excimer Laser 16%
• Electrical Device 16%
• Fine Grain 16%
• Surface Potential 16%
• Statistical Distribution 16%
• Relative Performance 16%
• Crystal Grain 16%
• Electric Field 16%

Material Science

• Nanowire 100%
• Grain Boundaries 100%
• Electrical Property 33%
• Thin-Film Transistor 33%
• Grain Size 33%
• Defect Density 33%
• Density 16%
• Liquid Crystal Display 16%
• Crystal Microstructure 16%
• Carrier Transport 16%
• Surface (Surface Science) 16%
• Single Crystal 16%